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[VHDL-FPGA-Verilog] TIMEFACEDETECTIONANDLIPFEATUREEXTRACTIONUSINGFPGA

Description: Abstract—This paper proposes a new technique for face detection and lip feature extraction. A real-time field-programmable gate array (FPGA) implementation of the two proposed techniques is also presented. Face detection is based on a naive Bayes classifier that classifies an edge-extracted representation of an image. Using edge representation significantly reduces the model’s size to only 5184 B, which is 2417 times smaller than a comparable statistical modeling technique, while achieving an 86.6 correct detection rate under various lighting conditions. Lip feature extraction uses the contrast around the lip contour to extract the height and width of the mouth, metrics that are useful for speech filtering. The proposed FPGA system occupies only 15 050 logic cells, or about six times less than a current comparable FPGA face detection system.-Abstract—This paper proposes a new technique for face detection and lip feature extraction. A real-time field-programmable gate array (FPGA) implementation of the two proposed techniques is also presented. Face detection is based on a naive Bayes classifier that classifies an edge-extracted representation of an image. Using edge representation significantly reduces the model’s size to only 5184 B, which is 2417 times smaller than a comparable statistical modeling technique, while achieving an 86.6 correct detection rate under various lighting conditions. Lip feature extraction uses the contrast around the lip contour to extract the height and width of the mouth, metrics that are useful for speech filtering. The proposed FPGA system occupies only 15 050 logic cells, or about six times less than a current comparable FPGA face detection system.
Platform: | Size: 28409856 | Author: ramanaidu | Hits:

[VHDL-FPGA-Verilog] verilogdct

Description: dct实现verilog hdl的数字图像处理，源代码-dct achieve verilog hdl digital image processing, source code
Platform: | Size: 28672 | Author: xutongxue | Hits:

[VHDL-FPGA-Verilog] YCbCr2RGB

Description: 将图像数据Ycbcr格式转换为rgb格式，方便显示器显示。-Converting the image data Ycbcr format to RGB format , facilitating the monitor display.
Platform: | Size: 1024 | Author: 秦立红 | Hits:

[Graph program] DE2_70_D5M_LTM_black-line

Description: 基于DE2-70的摄像头图像处理程序，主要在边缘检测上增加了视线内黑线判断的功能-Based on the DE2-70 camera image-processing program, mainly in the edge detection increased the black line within the line of sight to determine the function
Platform: | Size: 6322176 | Author: liliang | Hits:

[Other] 51622447jpeg_encoder

Description: THIS CODE HELPS TO THOSE WHO WANT TO DO ACADEMIC PROJCET ON IMAGE COMPRESSION.
Platform: | Size: 25600 | Author: bharath | Hits:

[Compress-Decompress algrithms] iqit(verilog)

Description: H.264算法中的反变换反量化部分的设计，能够实时处理720x576图像。-The IQIT part of H.264, which can process 720x576 image.
Platform: | Size: 8089600 | Author: zyx | Hits:

[Software Engineering] TheResearchoftherealtimesignalprocessingofSARbased

Description: 3．完成系统的FPGA程序开发与调试，主要包括FFT，IFFT，CMUL和转置 存储控制等模块，在此基础上，重点介绍了一种基于DDR SDRAM的行写行读高 效转置存储算法，在采用该算法进行转置存储操作时，读写两端的速度相匹配， 满足流水线操作要求，提高了整个系统的实时性。最后介绍了采用CORDIC算法 实现复图像求模运算的方法，分析了算法的硬件实现结构，并给出了基于FPGA 的实现方法及仿真结果。-he FPGA s development and debugging are implemented,including FFT, IFFT, CMUL and C0ntrol of CTM．Based Oll this，Implementation of a high efficient corner turn memory arithmetic with writing and reading by row based on DDR SDRAM is introduced．When using CTM with this algorithm，me speed of reading and writing maItches and meets the requirement of pipelined operation．Finally a method of model implementation for complex image based on CORDIC algorithm is introduced．The algorithm’s hardware implementation structure is analysed, and implementation methodology and simulation results are given
Platform: | Size: 5155840 | Author: mabeibei | Hits:

[VHDL-FPGA-Verilog] sc_camera_01APR08

Description: 基于FPGA的CMOS 传感器的图像传输处理.整个设计还基于NIOS.-FPGA-based CMOS sensor Image Transmission. The design is also based on NIOS.
Platform: | Size: 1881088 | Author: 陈炬 | Hits:

[Software Engineering] 0v7620_fpga

Description: 基于OV7620和FPGA的图像采集系统设计-OV7620 and FPGA-based image acquisition system
Platform: | Size: 371712 | Author: sailfish | Hits:

[Embeded-SCM Develop] code

Description: 基于ARM和CPLD的嵌入式数字图像处理系统-CPLD Based on ARM and embedded digital image processing system
Platform: | Size: 755712 | Author: 郭晶晶 | Hits:

[Software Engineering] OV7620_FPGA

Description: ov7620 fpga图像采集系统 期刊论文全文-ov7620 fpga image acquisition system, the full text journal papers
Platform: | Size: 371712 | Author: caizuhong | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_CCD_inverse

Description: DE2版自带的CCD驱动，将图像存储于SDRAM中-DE2 version comes with the CCD driver in the image stored in SDRAM
Platform: | Size: 3843072 | Author: 李博霖 | Hits:

[Mathimatics-Numerical algorithms] edge_detector

Description: image edge detection
Platform: | Size: 3072 | Author: sachin | Hits:

[Mathimatics-Numerical algorithms] edgedetect

Description: image edge detection using vhdl
Platform: | Size: 638976 | Author: sachin | Hits:

[Special Effects] Student_Image_Processing

Description: VHDL语言进行图像处理，具体的是实现给定图片的锐化和模糊处理-VHDL, image processing, specifically to achieve a given image sharpening and blur
Platform: | Size: 277504 | Author: mollyma | Hits:

[Documents] jiyufpga

Description: 基于FPGA的数字图像处理,对图像进行中值滤波处理，算法介绍，模块介绍-FPGA-based digital image processing, median filtering on image processing, algorithm description, module description
Platform: | Size: 308224 | Author: 积极 | Hits:

[Other] 2005-12-29_22-34-9_93

Description: 用ＶＨＤＬ实现dct．离散余弦变换(DCT)在图像编解码方面应用十分广泛,至今已被JPEG、MPEG1、MPEG2、MPEG4和H26x等国际标准所采用。由于其计算量较大,软件实现往往难以满足实时处理的要求,因而在很多实际应用中需要采用硬件设计的DCT处理电路来满足我们对处理速度的要求-Using VHDL implementation dct. Discrete cosine transform (DCT) in image decoding application of very extensive, has been JPEG, MPEG1, MPEG2, MPEG4, and H26x adopted international standards such as. Because of its large amount of calculation, software is often difficult to meet the requirements of real-time processing, which in many practical applications need to use the hardware design of the DCT processing circuits to meet the requirements of our processing
Platform: | Size: 3072 | Author: yangjing | Hits:

[VHDL-FPGA-Verilog] imageSample

Description: 这是一个图象传感器的数据采集程序，用Verilog语言编写，经测试通过，改程序可以作为图像数据采集参考，缩短开发时间。-This is an image sensor data collection procedures, with the Verilog language, has been tested and approved to change the image data acquisition procedure can be used as reference, to shorten development time.
Platform: | Size: 17408 | Author: 张俊 | Hits:

[VHDL-FPGA-Verilog] Focusing-system

Description: 应用FPGA以及VHDL编程语言、视频输入芯片SAA7111和输出芯片SAA7120实现对某固定图像的自动调焦-Application of FPGA and VHDL programming language, video input and output chip SAA7120 SAA7111 chip implementation of a fixed image of the auto-focus
Platform: | Size: 1366016 | Author: 武夷道人 | Hits:

[Special Effects] dwt-wavelet

Description: 二维离散小波变换，遥感图像处理，希望能够帮助大家。-Discrete wavelet transform, remote sensing image processing, want to help you.
Platform: | Size: 1024 | Author: 时间 | Hits:
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